Building an Efficient Micro-Server Ecosystem by Exceeding the Energy / Performance Scaling Envelope.
The number of intelligent Internet-connected devices is constantly growing and will soon be in the orders of tens of billions, forming the Internet of Things (IoT). The aggregate data exchange and processing requirements created by the IoT is immense. Coping with this imminent data flood requires to rethink the ways that we communicate and process data across the Internet and Cloud services and come up with more sustainable paradigms.
A recently introduced approach that has the potential to ensure the viability and scaling of the Internet in the IoT era is Edge computing, which evangelizes running services close to the data sources. Edge computing can reduce application latency, and decrease bandwidth requirements between the end-user and the datacenter, since part of, or in some cases all, processing is performed closer to the user. Realizing such an approach requires the design of new server ecosystem that can be deployed closer to data sources, without the need of any expensive cooling or powering infrastructure.
Achieving high performance and energy efficiency is particularly challenging due to the stagnant voltage scaling and the worsening process variations transistors experience as they approach the atomic scale. Each manufactured processor and memory module is becoming inherently different in terms of its energy footprint and performance. By neglecting this and continuing adopting pessimistic operating margins in voltage and frequency based on worst case operating conditions – that may seldom occur during the execution a realistic workload – we are artificially constraining the energy efficiency and performance that can be achieved.
To overcome these scaling boundaries we need to treat intrinsic hardware heterogeneity as an opportunity and not as a problem. Substituting the existing rather conservative margins according to the real capabilities of each individual core and memory-array has the potential to improve energy efficiency and performance, while allowing better utilization of the silicon real estate. This is exactly the target of our research effort. We introduce a novel hardware and software ecosystem for enabling and allowing operation at extended operating margins, far beyond the conservative ones.
The proposed cross-layer approach contributes to the following layers:
i) at the circuit, micro-architecture and architecture layer by automatically revealing the possible extended operating points (i.e.,voltage, frequency, refesh rate) of each hardware component.
ii) at the firmware layer, with low-level handlers for monitoring and controlling the operating status of the underlying hardware components, as well as performing periodical benchmarking of the hardware.
iii) at the software layer by enabling virtualization and programmability, ensuring high dependability and full utilization of the operational margins, observed in the underlying hardware by the Hypervisor. This level also features extensions for resource management within the cloud management framework (i.e. OpenStack). The proposed software stack enables the exploitation of extended margins with high, or even total transparency to developers and end-users.